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The
HSA board has been redesigned to become an integral part of our new
digital radio kit. Developers can access the analog world from their
FPGA board with a simple interface to CEPD’s HSA high-speed analog I/O
board. There is no need to design a complicated serial data and command
interface in the FPGA, because the HSA has a parallel interface, which
connects directly to an FPGA’s I/O pins through a connector or ribbon
cable. The analog interface utilizes SMB type connectors. The A/D
converter's maximum sample rate is 125MSPS. The board includes
anti-aliasing and reconstructive filters. The HSA is intended to aid
the development and test of DSP algorithms in FPGAs for a variety of
control and communications system applications. A DSP reference design
example and full documentation are included.
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